182 lines
3.0 KiB
ArmAsm
182 lines
3.0 KiB
ArmAsm
#include "aarch64_irq.h"
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.globl aarch64_init
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aarch64_init:
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/* set vector table */
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adr x0, aarch64_vectors
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msr vbar_el1, x0
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mov x0, 0
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ret
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.globl aarch64_get_el
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aarch64_get_el:
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mrs x0, CurrentEL
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lsr x0, x0, 0x02
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ret
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.globl aarch64_get32r
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aarch64_get32r:
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ldr w0, [x0]
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ret
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.globl aarch64_set32r
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aarch64_set32r:
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str w1, [x0]
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ret
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.globl aarch64_delay
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aarch64_delay:
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subs x0, x0, 1
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bne aarch64_delay
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ret
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.globl aarch64_irq_vector_init
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irq_vector_init:
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ret
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.globl aarch64_irq_enable
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aarch64_irq_enable:
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msr daifclr, 2
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ret
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.globl aarch64_irq_disable
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aarch64_irq_disable:
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msr daifset, 2
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ret
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/* Exceptions Vector Table
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* */
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.macro KERNEL_ENTER
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sub sp, sp, 256
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stp x0, x1, [sp, 16 * 0]
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stp x2, x3, [sp, 16 * 1]
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stp x4, x5, [sp, 16 * 2]
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stp x6, x7, [sp, 16 * 3]
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stp x8, x9, [sp, 16 * 4]
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stp x10, x11, [sp, 16 * 5]
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stp x12, x13, [sp, 16 * 6]
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stp x14, x15, [sp, 16 * 7]
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stp x16, x17, [sp, 16 * 8]
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stp x18, x19, [sp, 16 * 9]
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stp x20, x21, [sp, 16 * 10]
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stp x22, x23, [sp, 16 * 11]
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stp x24, x25, [sp, 16 * 12]
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stp x26, x27, [sp, 16 * 13]
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stp x28, x29, [sp, 16 * 14]
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str x30, [sp, 16 * 15]
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.endm
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.macro KERNEL_LEAVE
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ldp x0, x1, [sp, 16 * 0]
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ldp x2, x3, [sp, 16 * 1]
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ldp x4, x5, [sp, 16 * 2]
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ldp x6, x7, [sp, 16 * 3]
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ldp x8, x9, [sp, 16 * 4]
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ldp x10, x11, [sp, 16 * 5]
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ldp x12, x13, [sp, 16 * 6]
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ldp x14, x15, [sp, 16 * 7]
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ldp x16, x17, [sp, 16 * 8]
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ldp x18, x19, [sp, 16 * 9]
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ldp x20, x21, [sp, 16 * 10]
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ldp x22, x23, [sp, 16 * 11]
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ldp x24, x25, [sp, 16 * 12]
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ldp x26, x27, [sp, 16 * 13]
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ldp x28, x29, [sp, 16 * 14]
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ldr x30, [sp, 16 * 15]
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add sp, sp, 256
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.endm
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.macro VECTOR_ENTRY GOTO_LABEL
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.align 7
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b \GOTO_LABEL
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.endm
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.macro EXCEPTION_FALLBACK EID
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KERNEL_ENTER
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mov x0, \EID
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mrs x1, esr_el1
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mrs x2, elr_el1
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bl k_irq_fallback
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b die
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.endm
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die:
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b die
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.align 11
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.globl aarch64_vectors
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aarch64_vectors:
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/* EL1t */
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VECTOR_ENTRY el1t_sync
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VECTOR_ENTRY el1t_irq
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VECTOR_ENTRY el1t_fiq
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VECTOR_ENTRY el1t_error
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/* EL1h */
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VECTOR_ENTRY el1h_sync
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VECTOR_ENTRY el1h_irq
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VECTOR_ENTRY el1h_fiq
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VECTOR_ENTRY el1h_error
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/* EL0 - 64bit */
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VECTOR_ENTRY el0_64_sync
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VECTOR_ENTRY el0_64_irq
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VECTOR_ENTRY el0_64_fiq
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VECTOR_ENTRY el0_64_error
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/* EL0 - 32bit */
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VECTOR_ENTRY el0_32_sync
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VECTOR_ENTRY el0_32_irq
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VECTOR_ENTRY el0_32_fiq
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VECTOR_ENTRY el0_32_error
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el1t_sync:
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EXCEPTION_FALLBACK EL1t_SYNC
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el1t_irq:
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EXCEPTION_FALLBACK EL1t_IRQ
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el1t_fiq:
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EXCEPTION_FALLBACK EL1t_FIQ
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el1t_error:
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EXCEPTION_FALLBACK EL1t_ERROR
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el1h_sync:
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EXCEPTION_FALLBACK EL1h_SYNC
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el1h_irq:
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KERNEL_ENTER
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bl k_irq_handler
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KERNEL_LEAVE
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eret
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el1h_fiq:
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EXCEPTION_FALLBACK EL1h_FIQ
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el1h_error:
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EXCEPTION_FALLBACK EL1h_ERROR
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el0_64_sync:
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EXCEPTION_FALLBACK EL0_64_SYNC
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el0_64_irq:
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EXCEPTION_FALLBACK EL0_64_IRQ
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el0_64_fiq:
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EXCEPTION_FALLBACK EL0_64_FIQ
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el0_64_error:
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EXCEPTION_FALLBACK EL0_64_ERROR
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el0_32_sync:
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EXCEPTION_FALLBACK EL0_32_SYNC
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el0_32_irq:
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EXCEPTION_FALLBACK EL0_32_IRQ
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el0_32_fiq:
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EXCEPTION_FALLBACK EL0_32_FIQ
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el0_32_error:
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EXCEPTION_FALLBACK EL0_32_ERROR
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