Fix uart_mini initialization and emulation

Makefile

@@ -1,7 +1,7 @@
 include Makevars.mk
 
 # Rules
-
+#
 all: kernel
 
 $(BUILD_DIR)kernel:
@@ -24,3 +24,6 @@ debug: kernel
 	-ex 'file $(BUILD_DIR)kernel/kernel.elf' \
 	-ex 'target remote localhost:1234'
 	kill %1
+
+console:
+	sudo picocom -b 115200 -r -l /dev/ttyUSB0

Makevars.mk

@@ -21,12 +21,15 @@ AARCH64_QEMU = \
     -serial stdio \
     -monitor none \
 
-# AARCH64_QEMU = \
-#  qemu-system-aarch64 \
-#    -M raspi3 \
-#    -nographic \
-#    -kernel build/kernel/kernel.elf \
-#    -serial stdio \
-#    -monitor none \
+ AARCH64_QEMU = \
+  qemu-system-aarch64 \
+    -M raspi3 \
+    -nographic \
+    -kernel build/kernel/kernel.elf \
+    -serial /dev/null \
+    -serial stdio \
+    -monitor none \
+
+#    -kernel /home/elias/git/rpi/boards/pi3/aarch64/uart02/kernel8.img \
 # vim:ft=make
 #

kernel/Makefile

@@ -42,15 +42,19 @@ all: kernel
 
 default: kernel
 
-kernel: $(BUILD_DIR)kernel.elf
+kernel: $(BUILD_DIR)kernel.elf $(BUILD_DIR)kernel.list $(BUILD_DIR)kernel.bin
 
 $(BUILD_DIR)kernel.elf: $(OBJECT_FILES)
 	$(info linking target: $@)
 	$(AARCH64_LD) -T$(LD_SCRIPT) -nostdlib $^ -o $@
 	$(info done: $@)
 
+$(BUILD_DIR)kernel.list: $(BUILD_DIR)kernel.elf
+	$(AARCH64_OBJCOPY) -D $(BUILD_DIR)kernel.elf > $@
+
 $(BUILD_DIR)kernel.bin: $(BUILD_DIR)/kernel.elf
 	$(AARCH64_OBJCOPY) -O binary $< $@
+	cp $@ $(BUILD_DIR)kernel8.img
 
 $(BUILD_DIR)kernel.sym: $(BUILD_DIR)/kernel.elf
 	$(AARCH64_OBJCOPY) --only-keep-debug $< $@

kernel/aarch64/aarch64.S

@@ -26,7 +26,7 @@ aarch64_set32r:
 
 .globl aarch64_delay
 aarch64_delay:
-	subs x0, x0, 0x01
+	subs x0, x0, 1
 	bne aarch64_delay
 	ret
 

kernel/aarch64/aarch64.ld

@@ -1,16 +1,15 @@
-ENTRY(_start)
-
 SECTIONS
 {
-	/* For some reason qemu UART doesn't work with smaller address */
-	. = 0x40000000; 
-
-	.boot . : { boot.o(.text) }
+	.text.boot : { *(.text.boot) }
 	.text : { *(.text) }
+	.rodata : { *(.rodata) }
 	.data : { *(.data) }
-	.bss : { *(.bss COMMON) }
+	. = ALIGN(0x8);
+	bss_begin = .;
+	.bss : { *(.bss*) } 
+	bss_end = .;
 
 	. = ALIGN(8);
-	. = . + 0x1000;
+	. = . + 0x8000;
 	stack_ptr = . ;
 }

kernel/aarch64/boot.S

@@ -1,7 +1,8 @@
 
 #include "aarch64_reg.h"
 
-	.globl _start
+.section ".text.boot"
+.globl _start
 
 _start:
 	mrs x0, mpidr_el1       /* Check CPU ID */
@@ -12,10 +13,6 @@ idle:
 	b idle
 
 set_el:
-	/* check current exception level */
-	bl aarch64_get_el
-	cmp x0, 0x03
-	bne set_stack
 	/* set SCTRL_EL1 */
 	ldr x0, =SCTLR_VALUE_MMU_DISABLED
 	msr sctlr_el1, x0
@@ -36,6 +33,9 @@ set_el:
 set_stack:
 	ldr x30, =stack_ptr  /* defined in aarch64.ld */
 	mov sp,  x30
+	bl skip
+skip:
 	bl  k_main
+hang: b hang
 
 

kernel/core/irq.c

@@ -67,5 +67,5 @@ k_irq_fallback(int type, unsigned long esr, unsigned long address)
 	k_logu(esr, 16);
 	k_logs(", address: ");
 	k_logu(address, 16);
-	k_logs("\n");
+	k_logs("\r\n");
 }

kernel/core/main.c

@@ -31,7 +31,7 @@ k_main(void)
 
 	k_logs("Starting Lowe OS (EL");
 	k_logi(aarch64_get_el(), 10);
-	k_logs(")\n");
+	k_logs(")\r\n");
 
 	if (k_arch_init())
 		goto panic;

kernel/core/timer.c

@@ -35,5 +35,7 @@ k_timer_irq_handler(void)
 	m_current += m_interval;
 	aarch64_set32r(TIMER_C1, m_current);
 	aarch64_set32r(TIMER_CS, TIMER_CS_M1);
-	k_logs("Timer interrupt\n");
+	k_logs("Timer: ");
+	k_logu(m_current, 10);
+	k_logs("\r\n");
 }

kernel/device/uart/uart.h

@@ -23,7 +23,7 @@
 #define UART_QEMU 1
 
 #ifndef UART_DEFAULT
-#define UART_DEFAULT UART_QEMU
+#define UART_DEFAULT UART_MINI
 #endif
 
 #if UART_DEFAULT == UART_MINI
@@ -40,7 +40,7 @@
 
 #else
 
-#warning "Unsopported default UART"
+#warning "Unsupported default UART"
 
 #endif
 

kernel/device/uart/uart_mini.c

@@ -26,16 +26,18 @@ uart_mini_init(void)
 
 	/* Enable UART Mini and its registers*/
 	aarch64_set32r(AUX_ENABLES, 1);
-	/* Disable auto flow control, TX and RX */
-	aarch64_set32r(AUX_MU_CNTL_REG, 0);
 	/* Disable TX and RX interrupts */
 	aarch64_set32r(AUX_MU_IER_REG, 0);
+	/* Disable auto flow control, TX and RX */
+	aarch64_set32r(AUX_MU_CNTL_REG, 0);
 	/* Set 8bit mode */
-	aarch64_set32r(AUX_MU_LCR_REG, 0);
+	aarch64_set32r(AUX_MU_LCR_REG, 3);
 	/* Set RTS line HIGH */
 	aarch64_set32r(AUX_MU_MCR_REG, 0);
 	/* Set baud rate 115200 */
-	aarch64_set32r(AUX_MU_BAUD_REG, 0x10E);
+	aarch64_set32r(AUX_MU_IER_REG, 0);
+	aarch64_set32r(AUX_MU_IIR_REG, 0xC6);
+	aarch64_set32r(AUX_MU_BAUD_REG, 270);
 
 	sel = aarch64_get32r(GPFSEL1);
 	/* clean and set ALT5 for GPIO14 */
@@ -53,7 +55,7 @@ uart_mini_init(void)
 	aarch64_set32r(GPPUDCLK0, 0);
 
 	/* Enable TX and RX */
-	aarch64_set32r(AUX_MU_CNTL_REG, 0x03);
+	aarch64_set32r(AUX_MU_CNTL_REG, 3);
 
 	return 0;
 }