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Fix uart_mini initialization and emulation

This commit is contained in:
Ilja Kartašov 2019-12-02 12:59:40 +01:00
parent 417106b967
commit 6c4dba0929
11 changed files with 46 additions and 33 deletions
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5
Makefile
View File

@ -1,7 +1,7 @@
include Makevars.mk include Makevars.mk
# Rules # Rules
#
all: kernel all: kernel
$(BUILD_DIR)kernel: $(BUILD_DIR)kernel:
@ -24,3 +24,6 @@ debug: kernel
-ex 'file $(BUILD_DIR)kernel/kernel.elf' \ -ex 'file $(BUILD_DIR)kernel/kernel.elf' \
-ex 'target remote localhost:1234' -ex 'target remote localhost:1234'
kill %1 kill %1
console:
sudo picocom -b 115200 -r -l /dev/ttyUSB0

17
Makevars.mk
View File

@ -21,12 +21,15 @@ AARCH64_QEMU = \
-serial stdio \ -serial stdio \
-monitor none \ -monitor none \
# AARCH64_QEMU = \ AARCH64_QEMU = \
# qemu-system-aarch64 \ qemu-system-aarch64 \
# -M raspi3 \ -M raspi3 \
# -nographic \ -nographic \
# -kernel build/kernel/kernel.elf \ -kernel build/kernel/kernel.elf \
# -serial stdio \ -serial /dev/null \
# -monitor none \ -serial stdio \
-monitor none \
# -kernel /home/elias/git/rpi/boards/pi3/aarch64/uart02/kernel8.img \
# vim:ft=make # vim:ft=make
# #

6
kernel/Makefile
View File

@ -42,15 +42,19 @@ all: kernel
default: kernel default: kernel
kernel: $(BUILD_DIR)kernel.elf kernel: $(BUILD_DIR)kernel.elf $(BUILD_DIR)kernel.list $(BUILD_DIR)kernel.bin
$(BUILD_DIR)kernel.elf: $(OBJECT_FILES) $(BUILD_DIR)kernel.elf: $(OBJECT_FILES)
$(info linking target: $@) $(info linking target: $@)
$(AARCH64_LD) -T$(LD_SCRIPT) -nostdlib $^ -o $@ $(AARCH64_LD) -T$(LD_SCRIPT) -nostdlib $^ -o $@
$(info done: $@) $(info done: $@)
$(BUILD_DIR)kernel.list: $(BUILD_DIR)kernel.elf
$(AARCH64_OBJCOPY) -D $(BUILD_DIR)kernel.elf > $@
$(BUILD_DIR)kernel.bin: $(BUILD_DIR)/kernel.elf $(BUILD_DIR)kernel.bin: $(BUILD_DIR)/kernel.elf
$(AARCH64_OBJCOPY) -O binary $< $@ $(AARCH64_OBJCOPY) -O binary $< $@
cp $@ $(BUILD_DIR)kernel8.img
$(BUILD_DIR)kernel.sym: $(BUILD_DIR)/kernel.elf $(BUILD_DIR)kernel.sym: $(BUILD_DIR)/kernel.elf
$(AARCH64_OBJCOPY) --only-keep-debug $< $@ $(AARCH64_OBJCOPY) --only-keep-debug $< $@

2
kernel/aarch64/aarch64.S
View File

@ -26,7 +26,7 @@ aarch64_set32r:
.globl aarch64_delay .globl aarch64_delay
aarch64_delay: aarch64_delay:
subs x0, x0, 0x01 subs x0, x0, 1
bne aarch64_delay bne aarch64_delay
ret ret

15
kernel/aarch64/aarch64.ld
View File

@ -1,16 +1,15 @@
ENTRY(_start)
SECTIONS SECTIONS
{ {
/* For some reason qemu UART doesn't work with smaller address */ .text.boot : { *(.text.boot) }
. = 0x40000000;
.boot . : { boot.o(.text) }
.text : { *(.text) } .text : { *(.text) }
.rodata : { *(.rodata) }
.data : { *(.data) } .data : { *(.data) }
.bss : { *(.bss COMMON) } . = ALIGN(0x8);
bss_begin = .;
.bss : { *(.bss*) }
bss_end = .;
. = ALIGN(8); . = ALIGN(8);
. = . + 0x1000; . = . + 0x8000;
stack_ptr = . ; stack_ptr = . ;
} }

10
kernel/aarch64/boot.S
View File

@ -1,7 +1,8 @@
#include "aarch64_reg.h" #include "aarch64_reg.h"
.globl _start .section ".text.boot"
.globl _start
_start: _start:
mrs x0, mpidr_el1 /* Check CPU ID */ mrs x0, mpidr_el1 /* Check CPU ID */
@ -12,10 +13,6 @@ idle:
b idle b idle
set_el: set_el:
/* check current exception level */
bl aarch64_get_el
cmp x0, 0x03
bne set_stack
/* set SCTRL_EL1 */ /* set SCTRL_EL1 */
ldr x0, =SCTLR_VALUE_MMU_DISABLED ldr x0, =SCTLR_VALUE_MMU_DISABLED
msr sctlr_el1, x0 msr sctlr_el1, x0
@ -36,6 +33,9 @@ set_el:
set_stack: set_stack:
ldr x30, =stack_ptr /* defined in aarch64.ld */ ldr x30, =stack_ptr /* defined in aarch64.ld */
mov sp, x30 mov sp, x30
bl skip
skip:
bl k_main bl k_main
hang: b hang

2
kernel/core/irq.c
View File

@ -67,5 +67,5 @@ k_irq_fallback(int type, unsigned long esr, unsigned long address)
k_logu(esr, 16); k_logu(esr, 16);
k_logs(", address: "); k_logs(", address: ");
k_logu(address, 16); k_logu(address, 16);
k_logs("\n"); k_logs("\r\n");
} }

2
kernel/core/main.c
View File

@ -31,7 +31,7 @@ k_main(void)
k_logs("Starting Lowe OS (EL"); k_logs("Starting Lowe OS (EL");
k_logi(aarch64_get_el(), 10); k_logi(aarch64_get_el(), 10);
k_logs(")\n"); k_logs(")\r\n");
if (k_arch_init()) if (k_arch_init())
goto panic; goto panic;

4
kernel/core/timer.c
View File

@ -35,5 +35,7 @@ k_timer_irq_handler(void)
m_current += m_interval; m_current += m_interval;
aarch64_set32r(TIMER_C1, m_current); aarch64_set32r(TIMER_C1, m_current);
aarch64_set32r(TIMER_CS, TIMER_CS_M1); aarch64_set32r(TIMER_CS, TIMER_CS_M1);
k_logs("Timer interrupt\n"); k_logs("Timer: ");
k_logu(m_current, 10);
k_logs("\r\n");
} }

4
kernel/device/uart/uart.h
View File

@ -23,7 +23,7 @@
#define UART_QEMU 1 #define UART_QEMU 1
#ifndef UART_DEFAULT #ifndef UART_DEFAULT
#define UART_DEFAULT UART_QEMU #define UART_DEFAULT UART_MINI
#endif #endif
#if UART_DEFAULT == UART_MINI #if UART_DEFAULT == UART_MINI
@ -40,7 +40,7 @@
#else #else
#warning "Unsopported default UART" #warning "Unsupported default UART"
#endif #endif

12
kernel/device/uart/uart_mini.c
View File

@ -26,16 +26,18 @@ uart_mini_init(void)
/* Enable UART Mini and its registers*/ /* Enable UART Mini and its registers*/
aarch64_set32r(AUX_ENABLES, 1); aarch64_set32r(AUX_ENABLES, 1);
/* Disable auto flow control, TX and RX */
aarch64_set32r(AUX_MU_CNTL_REG, 0);
/* Disable TX and RX interrupts */ /* Disable TX and RX interrupts */
aarch64_set32r(AUX_MU_IER_REG, 0); aarch64_set32r(AUX_MU_IER_REG, 0);
/* Disable auto flow control, TX and RX */
aarch64_set32r(AUX_MU_CNTL_REG, 0);
/* Set 8bit mode */ /* Set 8bit mode */
aarch64_set32r(AUX_MU_LCR_REG, 0); aarch64_set32r(AUX_MU_LCR_REG, 3);
/* Set RTS line HIGH */ /* Set RTS line HIGH */
aarch64_set32r(AUX_MU_MCR_REG, 0); aarch64_set32r(AUX_MU_MCR_REG, 0);
/* Set baud rate 115200 */ /* Set baud rate 115200 */
aarch64_set32r(AUX_MU_BAUD_REG, 0x10E); aarch64_set32r(AUX_MU_IER_REG, 0);
aarch64_set32r(AUX_MU_IIR_REG, 0xC6);
aarch64_set32r(AUX_MU_BAUD_REG, 270);
sel = aarch64_get32r(GPFSEL1); sel = aarch64_get32r(GPFSEL1);
/* clean and set ALT5 for GPIO14 */ /* clean and set ALT5 for GPIO14 */
@ -53,7 +55,7 @@ uart_mini_init(void)
aarch64_set32r(GPPUDCLK0, 0); aarch64_set32r(GPPUDCLK0, 0);
/* Enable TX and RX */ /* Enable TX and RX */
aarch64_set32r(AUX_MU_CNTL_REG, 0x03); aarch64_set32r(AUX_MU_CNTL_REG, 3);
return 0; return 0;
} }