Fix uart_mini initialization and emulation
This commit is contained in:
+5
-1
@@ -42,15 +42,19 @@ all: kernel
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default: kernel
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kernel: $(BUILD_DIR)kernel.elf
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kernel: $(BUILD_DIR)kernel.elf $(BUILD_DIR)kernel.list $(BUILD_DIR)kernel.bin
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$(BUILD_DIR)kernel.elf: $(OBJECT_FILES)
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$(info linking target: $@)
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$(AARCH64_LD) -T$(LD_SCRIPT) -nostdlib $^ -o $@
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$(info done: $@)
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$(BUILD_DIR)kernel.list: $(BUILD_DIR)kernel.elf
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$(AARCH64_OBJCOPY) -D $(BUILD_DIR)kernel.elf > $@
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$(BUILD_DIR)kernel.bin: $(BUILD_DIR)/kernel.elf
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$(AARCH64_OBJCOPY) -O binary $< $@
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cp $@ $(BUILD_DIR)kernel8.img
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$(BUILD_DIR)kernel.sym: $(BUILD_DIR)/kernel.elf
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$(AARCH64_OBJCOPY) --only-keep-debug $< $@
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@@ -26,7 +26,7 @@ aarch64_set32r:
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.globl aarch64_delay
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aarch64_delay:
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subs x0, x0, 0x01
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subs x0, x0, 1
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bne aarch64_delay
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ret
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@@ -1,16 +1,15 @@
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ENTRY(_start)
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SECTIONS
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{
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/* For some reason qemu UART doesn't work with smaller address */
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. = 0x40000000;
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.boot . : { boot.o(.text) }
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.text.boot : { *(.text.boot) }
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.text : { *(.text) }
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.rodata : { *(.rodata) }
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.data : { *(.data) }
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.bss : { *(.bss COMMON) }
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. = ALIGN(0x8);
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bss_begin = .;
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.bss : { *(.bss*) }
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bss_end = .;
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. = ALIGN(8);
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. = . + 0x1000;
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. = . + 0x8000;
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stack_ptr = . ;
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}
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@@ -1,7 +1,8 @@
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#include "aarch64_reg.h"
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.globl _start
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.section ".text.boot"
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.globl _start
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_start:
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mrs x0, mpidr_el1 /* Check CPU ID */
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@@ -12,10 +13,6 @@ idle:
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b idle
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set_el:
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/* check current exception level */
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bl aarch64_get_el
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cmp x0, 0x03
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bne set_stack
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/* set SCTRL_EL1 */
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ldr x0, =SCTLR_VALUE_MMU_DISABLED
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msr sctlr_el1, x0
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@@ -36,6 +33,9 @@ set_el:
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set_stack:
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ldr x30, =stack_ptr /* defined in aarch64.ld */
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mov sp, x30
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bl skip
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skip:
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bl k_main
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hang: b hang
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+1
-1
@@ -67,5 +67,5 @@ k_irq_fallback(int type, unsigned long esr, unsigned long address)
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k_logu(esr, 16);
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k_logs(", address: ");
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k_logu(address, 16);
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k_logs("\n");
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k_logs("\r\n");
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}
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+1
-1
@@ -31,7 +31,7 @@ k_main(void)
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k_logs("Starting Lowe OS (EL");
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k_logi(aarch64_get_el(), 10);
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k_logs(")\n");
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k_logs(")\r\n");
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if (k_arch_init())
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goto panic;
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+3
-1
@@ -35,5 +35,7 @@ k_timer_irq_handler(void)
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m_current += m_interval;
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aarch64_set32r(TIMER_C1, m_current);
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aarch64_set32r(TIMER_CS, TIMER_CS_M1);
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k_logs("Timer interrupt\n");
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k_logs("Timer: ");
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k_logu(m_current, 10);
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k_logs("\r\n");
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}
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@@ -23,7 +23,7 @@
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#define UART_QEMU 1
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#ifndef UART_DEFAULT
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#define UART_DEFAULT UART_QEMU
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#define UART_DEFAULT UART_MINI
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#endif
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#if UART_DEFAULT == UART_MINI
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@@ -40,7 +40,7 @@
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#else
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#warning "Unsopported default UART"
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#warning "Unsupported default UART"
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#endif
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@@ -26,16 +26,18 @@ uart_mini_init(void)
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/* Enable UART Mini and its registers*/
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aarch64_set32r(AUX_ENABLES, 1);
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/* Disable auto flow control, TX and RX */
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aarch64_set32r(AUX_MU_CNTL_REG, 0);
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/* Disable TX and RX interrupts */
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aarch64_set32r(AUX_MU_IER_REG, 0);
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/* Disable auto flow control, TX and RX */
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aarch64_set32r(AUX_MU_CNTL_REG, 0);
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/* Set 8bit mode */
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aarch64_set32r(AUX_MU_LCR_REG, 0);
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aarch64_set32r(AUX_MU_LCR_REG, 3);
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/* Set RTS line HIGH */
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aarch64_set32r(AUX_MU_MCR_REG, 0);
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/* Set baud rate 115200 */
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aarch64_set32r(AUX_MU_BAUD_REG, 0x10E);
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aarch64_set32r(AUX_MU_IER_REG, 0);
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aarch64_set32r(AUX_MU_IIR_REG, 0xC6);
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aarch64_set32r(AUX_MU_BAUD_REG, 270);
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sel = aarch64_get32r(GPFSEL1);
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/* clean and set ALT5 for GPIO14 */
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@@ -53,7 +55,7 @@ uart_mini_init(void)
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aarch64_set32r(GPPUDCLK0, 0);
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/* Enable TX and RX */
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aarch64_set32r(AUX_MU_CNTL_REG, 0x03);
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aarch64_set32r(AUX_MU_CNTL_REG, 3);
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return 0;
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}
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